So what's state-of-the-art in open-source #FPGA?

Is #IceStorm where it's at? I'm interested in synthesizing cpu cores which I think puts me in the area of large-ish fabric devices but again I stopped looking for a few months and now I feel like I have no idea what to expect :)

@vertigo @h @cstanhope

@jjg @h @cstanhope reverse engineering work with Xilinx artix 7 is ongoing. Otherwise, the state-of-the-art is the Yosys tool chain for the iCE40HX family.

@jjg @h @cstanhope ISTR there was a recent announcement at a recent C3 convention to this effect, but I am not fully aware of what that announcement was about. Might want to check up the itinerary and videos from the latest C3 conference.

@vertigo I'm still not clear what's the situation regarding RISC-V and FPGA development, what's at the intersection of these two important building blocks. @jjg @cstanhope

@h @jjg @cstanhope Can you be more specific?

Right now, the "official" RISC-V reference implementation, Rocket, is still ASIC-optimized. FPGA-based RISC-V cores tend to be home-grown things these days.

You can still synthesize Rocket on an FPGA, but because it's optimized for ASICs, it needs a rather large FPGA to do so, since it's investing individual LUTs to things that can be only a few transistors in an ASIC.

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@cstanhope @jjg @h PicoRV32 is perhaps the most popular FPGA-optimized RISC-V core available, hands down.

To this day, my own KCP53000 core is *still* the only 64-bit FPGA-optimized core I'm aware of.

Both have their limitations, however; neither design can run Linux, for example.

I hope that my successor design (KCP53010 -- still vaporware!) will remedy some of them (it should be able to run Linux if it's ported), but it still won't be as complete or as fast as Rocket.

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